Most amplifiers in communication circuits are small signal amplifiers. Hence, they can be described by linear equations. We will consider several amplifiers including BJT, FET, operational amplifiers and differential amplifiers.

- The equivalent circuit of the BJT is shown Fig. 2-1
- r
_{b}¡¦ is the resistance between the terminal and the actual base junction, r_{p}is the base-emitter junction resistance. Typically r_{p }>> r_{b}¡¦. An estimation of r_{p}is - r
_{0}is the collector to emitter resistance typically of the order 15kƒW, r_{m}is the collector-base resistance of the order several MW - The transconductance g
_{m}r_{m}= b - A simplified version of the small-signal model equivalent circuit is given Fig. 2-2

- Fig. 2-3
- here the coupling capacitance is treated as a short circuit.
- The output voltage is therefore
- The input impedance, not including R
_{s}, is given be - Since r
_{p}depends on applied the input resistance will depend on it as well. - The current gain is

- The Circuit diagram and its equivalent circuit model for the CB amplifier are shown in Fig. 2-4
- Since the sum of the currents leaving the emitter junction is 0, we have the following expression
- If r0 is assumed to be large compared with R
_{s}, r_{p}à and R_{L}, the voltage gain is - if r
_{p}>> R_{s}(1+ƒb), the magnitude of the voltage gain will be the same as that of the common-emitter amplifier - The input impedance of the common-base amplifier is determined using the
following circuit
- Fig. 2-5
- The output impedance is determined using the following circuit
- Fig. 2-6
- The common-base amplifier has a voltage gain but its current gain is less than unity. It is used as non-inverting amplifiers where low input impedance and high output impedance is desired.
- It also has much better high-frequency response than CE amplifier and is often used in high-frequency circuits.

- The EF has a non-inverting voltage gain of less than 1
- However, it can combine with other stages, such as the CE stage, to realize a greater combined gain than CE stage alone
- Fig. 2-7 , Fig. 2-8 and Fig. 2-9
- Using the equivalent circuit the voltage gain if found to be
- EF configuration has the largest input impedance compared to the other configurations
- The output impedance is
- EF is used when low output impedance is needed. Also, although it has a voltage gain < 1, it has large current gain. It is frequently used as a power amplifier for low-impedance loads.

**Field-Effect
Transistors Amplifiers**

- There are two types of FETs -- JFETs and MOSFETs.
- The low-frequency small signal model is as shown in Fig. 2-10
- The transconductance is defined as
- For JFETs
- where g
_{m0}is the transconductance when gate-to-source bias voltage is 0, I_{D}is the drain current and I_{DSS}is the drain current when the gate-to-source voltage is 0. - For MOSFETs, g
_{m}is - where g
_{mR}is the transconductance at some specified drain bias current I_{DR}

- The common-source amplifier is similar to the common-emitter amplifier
- Fig. 2-11
- Normally R
_{g}>> R so V_{i}= V_{g} - The source voltage is determined from the following equations
- since the current leaving output node and source is zero
- The current through R
_{s}The source voltage is - The voltage gain is
- If rd >> R
_{s}and R_{L}we have the following relationship - For gm R
_{s}>> 1 we have

- The circuit diagram and its equivalent circuit model for source follower are shown in Fig. 2-12
- If R
_{b}>> R_{s}, then - The output impedance is
- which is much smaller than the other two FET amplifier configurations and is the major advantage for this configuration

- The common-gate amplifier is often used in high-frequency application and has a much larger bandwidth than the common source configuration.
- Fig. 2-13

- Thus
- The input impedance at the source can be found by solving for the source
current
- and
- since
- The output impedance is determined as
- but I
_{0}is also the current passing through the source resistance so - The common gate amplifier has the highest output impedance of the three FET amplifier

- Multistage amplifiers are used for impedance matching or to obtain extra gain.
- Power transistors have smaller gain-bandwidth product than low-power transistors, hence the power amplification stage is often operated near unity voltage gain in order to maximize the bandwidth
- Voltage amplification is carried out in the stages preceding the power amplification stage

- The FET cascode circuit has many high-frequency applications that two FETs are often fabricated as a single transistor with 2 gates. The source of the one transistor is continuous with the drain of the other so the device has 1 source, 1 drain and 2 gates
- The device offers low-noise and high gain in radio-frequency applications
- It is a versatile device which can be used as a mixer or automatic gain control amplifier. The equivalent circuit is as shown in Fig. 2-14
- Here gate 2 and the source are grounded
- The load resistance of the first stage is the input resistance of the second stage, and the second stage is a common-gate amplifier. Therefore
- Since
- where g
_{mR}is the transconductance at some specified drain bias current IDR. - Since both transistors have the same drain current g
_{m1}=g_{m2}. Thus V_{i}=-V_{D1}and V_{gs2}=-V_{s2}=-V_{D1}

- Transistors all exhibit a nonlinear characteristic that causes distortion of the input signal levels. Such distortion can be eliminated by push-pull amplifier
- Fig. 2-15
- The above example uses 2 center-tapped transformers. The input transformer
separates the input signal into 2 signal 180
^{o}out of phase. The output transformer is used to sum the output currents of the two transistors. - Hence
- If the input signal is V
_{i}= A cos wt - then the output of the 2 transistors are also periodic, and they can be
expressed in a Fourier series
- If the two transistors are identical then I
_{1}and I_{2}are identical except I_{2}lags I_{1}by 180^{o}. Thus - The output current is
- The even harmonics are eliminated from the output. This is important as FET have a square-law characteristic that generates a relatively large second harmonic.

- The differential amplifier is an essential building block in modern IC amplifiers. The circuit is shown Fig. 2-16
- The operation of this circuit is based on the ability to fabricate matched
components on the same chip. In the figure I
_{EE}is realized using a current mirror. We assume that Q_{1}and Q_{2}are identical transistors and both collector resistors fabricated with equal values. - The KVL expression for the loop containing the two emitter-base junctions
is
- The transistors are biased in the forward-active mode, the reverse saturation
current of the collector-base junction is negligible. The collector currents
IC1 and IC2 are given by
- where we assumed that exp(V
_{bb}/kT) >> 1 - where Vd is the difference between the two input voltages. KCL at the emitter
node requires
- Similarly , The transfer characteristic for the emitter-coupled pair is shown in Fig. 2-17
- If V
_{d}= 0 then I_{C1}= I_{C2} - If we incrementally increase V
_{1}by Dv/2and simultaneously decrease V_{2}by Dv/2. The differential voltage becomes Dv. For Dv< 4kT as indicated in the transfer characteristics above the circuit behaves linearly. I_{C1}increases by DI_{C}and I_{C2}decreases by the same amount.

- Consider both V
_{1}and V_{2}are increased by Dv/2. The difference voltage remains 0, and I_{C1}and Ic2 remain equal. However, both I_{C1}and I_{C2}exhibit a small increase dI_{C}. Hence the current in R_{E}increases by 2dI_{C}. The voltage V_{E}is no longer constant but increase by an amount of 2dI_{C}R_{B}. This situation where equal signal are applied to Q_{1}and Q_{2}is the called the common mode. - Usually differential amplifiers are designed such that only differential signals are amplified.

**Analysis of Differential
Amplifiers**

- The analysis of differential amplifiers is simplified using ¡§half-circuit¡¨ concept. The equivalent circuit model for differential and common modes are shown in Fig. 2-18
- Differential mode gain
- Common mode gain is
- The Common Mode Rejection Ration (CMRR) is defined as
- From the above we obtain
- If arbitrary signals V1 and V2 are applied to the inputs then